The present invention relates to a printed board for mounting thereon electronic components such as an IC chip and armethod of manufacturing the printed board. More particularly, the present invention relates to a printed circuit board including therein a capacitor or the like and a method of manufacturing the printed circuit board.
At present, for the purpose of smoothly supplying electric power to an IC chip, a chip capacitor is often mounted on the surface of a printed circuit board used as a package substrate.
The reactance of a wiring from the chip capacitor to the IC chip depends on frequency. Due to this, as IC chip driving frequency increases, the chip capacitor cannot exhibit sufficient effect even if the chip capacitor is mounted on the surface of the printed circuit board. Considering this, the applicant of the present invention proposed a technique, identified as Japanese Patent Application No. 11-248311, for forming a concave portion on a core substrate so as to contain therein a chip capacitor. Techniques for embedding a capacitor in a substrate are disclosed in Japanese Patent Unexarnined Application Publication (to be referred to as xe2x80x9cPublicationxe2x80x9d hereinafter) Nos. 6-326472, 7-263619, 10-256429, 11-45955, 11-126978, 11-312868 and the like.
Publication No. 6-326472 discloses a technique for embedding a capacitor in a resin substrate made of glass epoxy. With this constitution, it is possible to reduce power supply noise and to dispense with a space for mounting the chip capacitor, thereby making an insulating substrate small in size. Publication No.7-263619 discloses a technique for embedding a capacitor in a substrate made of ceramic, alumina or the like. With this constitution, the capacitor is connected between a power supply layer and a ground layer to thereby shorten wiring length and reduce wiring inductance.
However, according to the Publication Nos. 6-326472 and 7-263619 stated above, the distance from the IC chip to the capacitor cannot be set too short and the wiring inductance cannot be reduced as currently desired in the higher frequency region of the IC chip. In case of a multi-layer buildup wiring board made of resin, in particular, due to the difference in the coefficient of thermal expansion and a capacitor made of ceramic and a core substrate as well as interlayer resin insulating layers made of resin, disconnection occurs between the terminal of the chip capacitor and a via, separation occurs between the chip capacitor and the interlayer resin insulating layers and cracks occur to the interlayer resin insulating layers. Thus, the multi-layer buildup wiring board could not realize high reliability for a long time.
On the other hand, according to the invention of Publication No. 11-248311, if the position at which a capacitor is arranged is deviated, the connection between the terminal of the capacitor and a via cannot be accurately established and power cannot be possibly supplied from the capacitor to the IC chip.
The present invention has been made to solve the above-stated problems. It is, therefore, an object of the present invention to provide a printed circuit board including therein a capacitor and having enhanced connection reliability and to provide a method of manufacturing the printed circuit board.
In order to achieve the above purpose, according to claim 1, aprinted circuit board constituted by alternately laminating interlayer resin insulating layers and conductive circuits in a multilayer manner on a core substrate containing a capacitor, characterized in that
the core substrate containing said capacitor is constituted by providing a first resin substrate, a second resin substrate having an opening for containing the capacitor and a third resin substrate in a multilayer manner while interposing bonding plates.
According to claim 16, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (d):
(a) formingaconductor pad section ona first resin substrate;
(b) connecting a capacitor to said conductor pad section of said first resin substrate through a conductive bonding agent;
(c) providing a third resin substrate, a second resin substrate having an opening for containing said capacitor and said first resin substrate in a multilayer manner while interposing bonding plates so that said capacitor of said first resin substrate is contained in said opening of said second resin substrate and that said opening of said second resin substrate is closed by the third resin substrate; and
(d) heating and pressurizing said first resin substrate, said second resin substrate and said third resin substrate, to thereby provide a core substrate.
According to a printed circuit board recited in claim 1 and a printed circuit board manufacturing method recited in claim 16, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. Further, since the core substrate is constituted by providing resin substrates in a multilayer manner, it can obtain sufficient strength. Besides, since the core substrate is constituted smoothly by providing the first resin substrate and the third resin substrate on the both sides of the core substrate, respectively, it is possible to appropriately form interlayer resin insulating layers and conductor circuits on the core substrate and to thereby decrease the probability of the occurrence of defective printed circuit boards.
Interlayer resin insulating layers are provided on the core substrate, via holes or through holes are provided in the interlayer resin insulating layers, and conductor circuits serving as conductive layers are formed, which means the circuit is formed by a buildup method. As the buildup method, either a semi-additive method, a full additive method can be employed.
It is preferable that a gap is filled with a resin. By removing the gap between the capacitor and the core substrate, the capacitor included in the core substrate behaves less frequently. Even if a stress resulting from the capacitor occurs, the stress can be eased by the filled resin. Also, the resin can advantageously bond the capacitor to the core substrate and prevent migration.
According to claim 2, each of the bonding plates has a core impregnated with a thermosetting resin. Due to this, the core substrate can obtain high strength.
According to claim 3, each of the first, second and third resin substrates has a core impregnated with a resin. Due to this, the core substrate can obtain high strength.
According to claim 4, a plurality of capacitors are contained in the core substrate. Due to this, it is possible to highly integrate the capacitors.
According to claim 5, the conductor circuits are formed on the second resin substrate. Due to this, it is possible to increase the wiring density of the substrate and to reduce the number of interlayer resin insulating layers.
According to claim 6, the capacitor is contained in the substrate and, at the same time, a capacitor is provided on the surface of the printed circuit board. Since the capacitor is contained in the printed circuit board, the distance between the IC chip and the capacitor is shortened, loop inductance is reduced and power can be supplied momentarily. Since the capacitor is also provided on the surface of the printed circuit board, a mass storage capacitor can be attached and high power can be easily supplied to the IC chip.
According to claim 7, the capacitance of the capacitor on the surface is equal to or higher than that of a capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claim 8, the inductance of the capacitor on the surface is equal to or higher than that of the capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claims 9 and 10, the electrode of the chip capacitor on which the metal film is formed is made electrically connectable using a via hole made of a plated material. Here, the electrode of the chip capacitor is made by metalization and has irregular portions on the surface thereof. However, the surface of the chip capacitor is smoothed by the metal film and disconnection does not occur to the electrode, the bonding plates or the like even if a heat cycle test is conducted.
The metal film of the electrode of the capacitor is preferably made of one selected from copper, nickel and noble metal. This is because a layer made of tin or zinc tends to induce migration to the capacitor included in the substrate. For that reason, the metal film can also prevent the occurrence of migration.
Further, the surface of the chip capacitor may be roughed. By doing so, the adhesiveness between the chip capacitor made of ceramic and the bonding layer, the interlayer resin insulating layers made of a resin is high and the separation of the bonding layers and the interlayer resin insulating layers does not occur to interfaces even if a heat cycle test is conducted.
According to claim 11, at least a part of a coating layer of the electrode of the capacitor is exposed and contained in the printed circuit board to thereby make the electrode exposed from the coating layer electrically connectable. In this case, it is preferable that the metal exposed from the coating layer mainly consists of copper. This is because connection resistance can be reduced.
According to claim 12, a chip capacitor having electrodes formed inside of an outer edge thereof is employed. Due to this, even if continuity is established through the via hole, a large external electrode can be provided and the allowable range of alignment is widened, so that connection defect can be eliminated.
According to claim 13, acapacitor having electrodes formed in a matrix is employed. Due to this, a large chip capacitor can be contained in the core substrate. Accordingly, capacitance can be increased and electrical problems can be, therefore, solved. Besides, even if going through various heat histories, the printed circuit board does not warp so easily.
According to claim 14, a plurality of chip capacitors for providing many capacitors may be coupled to be employed as the capacitor. By doing so, it is possible to appropriately adjust capacitance and to appropriately operate the IC chip.
According to claim 15, the coefficient of thermal expansion of the insulating bonding agent is set lower than that of the containing layer, i.e., set closer to that of the capacitor made of ceramic. Due to this, even if an internal stress resulting from the difference in the coefficient of thermal expansion between the core substrate and the capacitor occurs in a heat cycle test, cracks, separation and the like less occur to the core substrate, thereby making it possible to attain high reliability.
To obtain the above-stated object, the invention recited in claim 17 is a printed circuit board constituted by providing resin insulating layers and conductor circuits on a core substrate in a multilayer manner, technically characterized in that
the core substrate is constituted by bonding together a plurality of resin substrates, the conductor circuits formed on the plurality of resin substrates; and
a capacitor is contained in the core substrate.
The invention recited in claim 18 is a printed circuit board constituted by providing resin insulating layers and conductor circuit on a core substrate in a multilayer manner, technically characterized in that
the core substrate is constituted by bonding together a plurality of resin substrates, the conductor circuits formed on the plurality of resin substrates; and
a capacitor is contained in a concave portion formed in the core substrate.
According to claims 17 and 18, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Due to this, it is possible to reduce the loop inductance of the printed circuit board. In addition, since the core substrate is formed by providing a plurality of resin substrates on which the conductor circuits are formed in a multilayer manner, the wiring density of the core substrate is increased and the number of interlayer resin insulating layers can be reduced.
Interlayer resin insulating layers are provided on the core substrate, via holes or through holes are provided in the interlayer resin insulating layers, and conductor circuits serving as conductive layers are formed, which means a circuit formed by a buildup method. As the buildup method, either a semi-additive method, a full additive method can be employed.
It is preferable that a gap is filled with a resin. By removing the gap between the capacitor and the core substrate, the capacitor included in the core substrate behaves less frequently. Even if a stress resulting from the capacitor occurs, the stress can be eased by the filled resin. Also, the resin can advantageously bond the capacitor to the core substrate and prevent migration.
According to claim 19, a plurality of resin substrates are bonded together with bonding plates interposed therebetween. Due to this, it is possible to strongly bond the resin substrates together.
According to claim 20, each of the bonding plates has a core impregnated with a thermosetting resin. Due to this, the core substrate can obtain high strength.
According to claim 21, each of the resin substrates has a core impregnated with a resin. Due to this, the core substrate can obtain high strength.
According to claim 22, a plurality of capacitors are contained in the core substrate. Due to this, it is possible to highly integrate the capacitors.
According to claim 23, the capacitor is contained in the substrate and, at the same time, a capacitor is provided on the surface of the printed circuit board. Since the capacitor is contained in the printed circuit board, the distance between the IC chip and the capacitor is shortened, loop inductance is reduced and power can be supplied momentarily. Since the capacitor is also provided on the surface of the printed circuit board, a mass storage capacitor can be attached and high power can be easily supplied to the IC chip.
According to claim 24, the capacitance of the capacitor on the surface is equal to or higher than that of a capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claim 25, the inductance of the capacitor on the surface is equal to or higher than that of the chip capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claims 26 and 27, the electrode of the chip capacitor on which the metal film is formed is made electrically connectable using a via hole made of a plated material. Here, the electrode of the chip capacitor is made by metalization and has irregular portions on the surface thereof. However, since the surface of the chip capacitor is smoothed by the metal film and the via hole is formed, resin residue does not remain when a through hole is formed in the resin coated on the electrode and the reliability of the connection between the via hole and the electrode can be enhanced. Further, since the via hole is formed by plating in the electrode having a plated member formed thereon, the characteristics of the connection between the electrode and the via hole is high and disconnection does not occur between the electrode and the via hole even if a heat cycle test is conducted.
The metal film of the electrode of the capacitor is preferably made of one selected from copper, nickel and noble metal. This is because a layer made of tin or zinc tends to induce migration to the capacitor included in the substrate. For that reason, the metal film can also prevent the occurrence of migration.
Further, the surface of the chip capacitor may be roughed. By doing so, the adhesiveness between the chip capacitor made of ceramic and the bonding layer, the interlayer resin insulating layers made of a resin is high and the separation of the interlayer resin insulating layers does not occur to interfaces even if a heat cycle test is conducted.
According to claim 28, at least a part of a coating layer of the electrode of the capacitor is exposed and contained in the printed circuit board to thereby make the electrode exposed from the coating layer electrically connectable. In this case, it is preferable that the metal exposed from the coating layer mainly consists of copper. This is because high connection characteristics can be ensured and connection resistance can be reduced even if a metal layer is formed by plating on the exposed metal.
According to claim 29, a chip capacitor having electrodes formed inside of an outer edge thereof is employed. Due to this, even if continuity is established through the via hole, a large external electrode can be provided and the allowable range of alignment is widened, so that connection defect can be eliminated.
According to claim 30, a capacitor having electrodes formed in a matrix is employed. Due to this, a large chip capacitor can be contained in the core substrate. Accordingly, capacitance can be increased and electrical problems can be, therefore, solved. Besides, even if going through various heat histories, the printed circuit board does not warp so easily.
According to claim 31, a plurality of chip capacitors for providing many capacitors may be coupled to be employed as the capacitor. By doing so, it is possible to appropriately adjust capacitance and to appropriately operate the IC chip.
According to claim 32, the coefficient of thermal expansion of the insulating bonding agent is set lower than that of the core substrate, i.e., set closer to that of the capacitor made of ceramic. Due to this, even if an internal stress resulting from the difference in the coefficient of thermal expansion between the core substrate and the capacitor occurs in a heat cycle test, cracks, separation and the like less occur to the core substrate, thereby making it possible to attain high reliability.
According to claim 33, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (e):
(a) forming conductor circuits on a plurality of resin substrates;
(b) providing a plurality of said resin substrates in a multilayer manner through bonding plates;
(c) bonding together said resin substrates through said bonding plates, to thereby provide a core substrate;
(d) forming a concave portion in said core substrate; and
(e) containing a capacitor in said concave portion.
According to claim 34, a printed circuit board manufacturing method comprising at least the following steps (a) to (e):
(a) forming a resin substrate with a through hole and having a conductor circuit provided on a surface;
(b) forming a resin substrate without athrough hole and having a conductor circuit provided on a surface;
(c) providing said resin substrate with the through hole and said resin substrate without the through hole through a bonding plate in a multilayer manner;
(d) bonding together said resin substrates through said bonding plate, to thereby provide a core substrate; and
(e) containing a capacitor in said concave portion.
According to claims 33 and 34, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. Also, since the core substrate is formed by providing a plurality of resin substrates, on which conductor circuits are formed, in a multilayer manner, wiring density within the core substrate is increased and the number of interlayer resin insulating layers can be reduced.
In order to achieve the above purpose, according to claim 35, a printed circuit board constituted by alternately providing interlayer resin insulating layers and conductor circuits in a multilayer manner on a core substrate containing a capacitor, characterized in that
the core substrate containing said capacitor is constituted by providing a first resin substrate, a second resin substrate having an opening for containing the capacitor and a third resin substrate in a multilayer manner while interposing bonding plates; and
via holes connected to a terminal of said capacitor are provided on both sides of said core substrate.
According to a printed circuit board recited in claim 35, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. Further, since the core substrate is constituted by providing resin substrates in a multilayer manner, it can obtain sufficient strength. Besides, since the core substrate is constituted smoothly by providing the first resin substrate and the third resin substrate on the both sides of the core substrate, respectively, it is possible to appropriately form interlayer resin insulating layers and conductor circuits on the core substrate and to thereby decrease the probability of the occurrence of defective printed circuit boards. Further, since the via holes are provided on the both sides of the core substrate, it is possible to connect the IC chip to the capacitor and an external connection substrate to the capacitor with shortest distances and it is possible to momentarily supply high power from the external connection substrate to the IC chip.
Interlayer resin insulating layers are provided on the core substrate, via holes or through holes are provided in the interlayer resin insulating layers, and conductor circuits serving as conductive layers are formed, which means the circuit is formed by a buildup method. As the buildup method, either a semi-additive method, a full additive method can be employed.
Further, by arranging connection wirings, it is possible to provide wirings below the capacitor. As a result, the degree of freedom for wirings increases, thereby making it possible to realize high density and make the printed circuit board small in size.
It is preferable that a resin is filled between the capacitor and the substrate. By removing the gap between the capacitor and the substrate, the capacitor included in the core substrate behaves less frequently. Even if a stress resulting from the capacitor occurs, the stress can be eased by the filled resin. Also, the resin can advantageously bond the capacitor to the core substrate and prevent migration.
According to claim 36, each of the bonding plates has a core impregnated with a thermosetting resin. Due to this, the core substrate can obtain high strength.
According to claim 37, each of the first, second and third resin substrates has a core impregnated with a resin. Due to this, the core substrate can obtain high strength. For example, a core impregnated with a reinforcing material such as glass epoxy or glass phenol can be employed.
According to claim 38, since a plurality of capacitors are contained in the core substrate, it is possible to highly integrate the capacitors. It is, therefore, possible to ensure more capacitance.
According to claim 39, the conductor circuits are formed on the second resin substrate. Due to this, it is possible to increase the wiring density of the substrate and to reduce the number of interlayer resin insulating layers.
According to claim 40, the capacitor is contained in the substrate and, at the same time, a capacitor is provided on the surface of the printed circuit board. Since the capacitor is contained in the printed circuit board, the distance between the IC chip and the capacitor is shortened, loop inductance is reduced and power can be supplied momentarily. Since the capacitor is also provided on the surface of the printed circuit board, a mass storage capacitor can be attached and high power can be easily supplied to the IC chip.
According to claim 41, the capacitance of the capacitor on the surface is equal to or higher than that of a capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claim 42, the inductance of the capacitor on the surface is equal to or higher than that of the capacitor on an inner layer. Due to this, it is possible to ensure the desired operation of the IC chip without lack of power supply in a high frequency region.
According to claims 43 and 44, the electrode of the chip capacitor on which the metal film is formed is made electrically connectable using a via hole made of a plated material. Here, the electrode of the chip capacitor is made by metalization and has irregular portions on the surface thereof. However, since the surface of the chip capacitor is smoothed by the metal film and the via hole is formed, resin residue does not remain when a through hole is formed in the resin coated on the electrode and the reliability of the connection between the via hole and the electrode can be enhanced. Further, since the via hole is formed by plating in the electrode having a plated member formed thereon, the characteristics of the connection between the electrode and the via hole is high and disconnection does not occur between the electrode and the via hole even if a heat cycle test is conducted.
The metal film of the electrode of the capacitor is preferably made of one selected from copper, nickel and noble metal. This is because a layer made of tin or zinc tends to induce migration to the capacitor included in the substrate. For that reason, the metal film can also prevent the occurrence of migration.
Further, the surface of the chip capacitor may be roughed. By doing so, the adhesiveness between the chip capacitor made of ceramic and the bonding layer, the interlayer resin insulating layers made of a resin is high and the separation of the bonding layers and the interlayer resin insulating layers does not occur to interfaces even if a heat cycle test is conducted.
According to claim 45, at least a part of a coating layer of the electrode of the capacitor is exposed and contained in the printed circuit board to thereby make the electrode exposed from the coating layer electrically connectable. In this case, it is preferable that the metal exposed from the coating layer mainly consists of copper. This is because high connection characteristics can be ensured and connection resistance can be reduced even if a metal layer is formed by plating on the exposed metal.
According to claim 46, a chip capacitor having electrodes formed inside of an outer edge thereof is employed. Due to this, even if continuity is established through the via hole, a large external electrode can be provided and the allowable range of alignment is widened, so that connection defect can be eliminated.
According to claim 47, a chip capacitor having electrodes formed in a matrix is employed. Due to this, a large chip capacitor can be contained in the core substrate. Accordingly, capacitance can be increased and electrical problems can be, therefore, solved. Besides, even if going through various heat histories, the printed circuit board does not warp so easily.
According to claim 48, a plurality of chip capacitors for providing many capacitors may be coupled to be employed as the capacitor. By doing so, it is possible to appropriately adjust capacitance and to appropriately operate the IC chip.
According to claim 49, the coefficient of thermal expansion of the insulating bonding agent is set lower than that of the containing layer, i.e., set closer to that of the capacitor made of ceramic. Due to this, even if an internal stress resulting from the difference in the coefficient of thermal expansion between the core substrate and the capacitor occurs in a heat cycle test, cracks, separation and the like less occur to the core substrate, thereby making it possible to attain high reliability.
According to claim 50, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (d):
(a) attaching a capacitor to a first resin substrate through a bonding material;
(b) providing a third resin substrate, a second resin substrate having an opening for containing said capacitor and a first resin substrate in a multilayer manner so that said capacitor of said first resin substrate is contained in said opening of said second substrate and that said opening of said second resin substrate is closed by said third resin substrate, thereby providing a core substrate;
(c) applying laser and forming a via hole opening reaching said capacitor in said core substrate;
(d) forming a via hole in said via hole opening.
According to claim 50, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board.
According to claim 51, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (f):
(a) forming a via hole formation opening in a metal film on one side of a first resin substrate;
(b) attaching a capacitor to a metal film unformed surface of said first resin substrate through a bonding material;
(c) providing a third resin substrate, a second resin substrate having an opening for containing said capacitor and said first resin substrate in a multilayer manner by interposing bonding plates so that said capacitor of said first resin substrate is contained in said opening of said second resin substrate and that said opening of said second resin substrate is closed by said third resin substrate;
(d) heating and pressurizing said first resin substrate, said second resin substrate and said third resin substrate, to thereby provide a core substrate;
(e) applying laser to said via hole formation opening formed in said metal film of said first resin substrate, and forming a via hole opening reaching said capacitor; and
(f) forming a via hole in said via hole opening.
According to claim 51, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. In addition, an opening is provided in the metal film of the first resin substrate having the metal film formed on one side thereof by etching or the like. By applying laser to the position of the opening, the resin insulating layer exposed from the opening is removed and an opening for a via hole is provided. As a result, the opening diameter of the via hole depends on the opening diameter of the metal film, so that it is possible to form the via hole to have an appropriate opening diameter. Likewise, the positional accuracy of the via hole opening depends on the opening position of the metal film. Due to this, even if the positional accuracy of the laser application is low, it is possible to form the via hole at an appropriate position.
According to claim 52, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (f):
(a) forming via hole formation openings in metal films of a first resin substrate and a third resin substrate, the metal films bonded on one sides of said first resin substrate and said third resin substrate, respectively;
(b) attaching a capacitor to a metal film unformed surface of said first resin substrate through a bonding material;
(c) providing said third resin substrate, a second resin substrate having an opening for containing said capacitor and said first resin substrate in a multilayer manner by providing a bonding plate on said metal film unformed surface so that said capacitor of said first resin substrate is contained in said opening of said second resin substrate and that said opening of said second resin substrate is closed by said third resin substrate;
(d) heating and pressurizing said first resin substrate, said second resin substrate and said third resin substrate, to thereby provide a core substrate;
(e) applying laser to said via hole formation openings formed in said first resin substrate and said third resin substrate, a and forming a via hole opening reaching said capacitor; and
(f) forming a via hole in said via hole opening.
According to claim 52, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. In addition, openings are provided in the metal films of the first and third resin substrates each having the metal film formed on one side thereof, respectively, by etching or the like. By applying laser to the position of the opening, the resin insulating layer exposed from the opening is removed and an opening for a via hole is provided. As a result, the opening diameter of the via hole depends on the opening diameter of the metal film, so that it is possible to form the via hole to have an appropriate opening diameter. Likewise, the positional accuracy of the via hole opening depends on the opening position of the metal film. Due to this, even if the positional accuracy of the laser application is low, it is possible to form the via hole at an appropriate position.
Further, since the core substrate is constituted by providing resin substrates in a multilayer manner, it can obtain sufficient strength. Besides, since the core substrate is constituted smoothly by providing the first resin substrate and the third resin substrate on the both sides of the core substrate, respectively, it is possible to appropriately form interlayer resin insulating layers and conductor circuits on the core substrate and to thereby decrease the probability of the occurrence of defective printed circuit boards. Further, since the via holes are provided on the both sides of the core substrate, it is possible to connect the IC chip to the capacitor and an external connection substrate to the capacitor with shortest distances and it is possible to momentarily supply high power from the external connection substrate to the IC chip.
According to claim 53, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (g):
(a) forming a through hole formation openings in metal films of a first resin substrate and a third resin substrate, the metal films bonded on one sides of said first resin substrate and said third resin substrate, respectively;
(b) attaching a capacitor to a metal film unformed surface of said first resin substrate through a bonding material;
(c) providing said third resin substrate, a second resin substrate having an opening for containing said capacitor and said first resin substrate in a multilayer manner by providing a bonding plate on said metal film unformed surface so that said capacitor of said first resin substrate is contained in said opening of said second resin substrate and that said opening of said second resin substrate is closed by said third resin substrate;
(d) heating and pressurizing said first resin substrate, said second resin substrate and said third resin substrate, to thereby provide a core substrate;
(e) applying laser to said through hole formation openings formed in said first resin substrate and said third resin substrate, and forming a via hole opening reaching said capacitor;
(f) removing or thinning said metal films; and
(g) forming a conductor circuit and a via hole on said core substrate.
According to claim 53, the capacitor can be contained in the core substrate and the distance between the IC chip and the capacitor is shortened. Therefore, it is possible to reduce the loop inductance of the printed circuit board. In addition, an opening is provided in the metal film of the first resin substrate having the metal film formed on one side thereof by etching or the like. By applying laser to the position of the opening, the resin insulating layer exposed from the opening is removed and an opening for a via hole is provided. Thereafter, the metal film is removed by etching or the like. As a result, the opening diameter of the via hole depends on the opening diameter of the metal film, so that it is possible to form the via hole to have an appropriate opening diameter. Likewise, the positional accuracy of the via hole opening depends on the opening position of the metal film. Due to this, even if the positional accuracy of the laser application is low, it is possible to form the via hole at an appropriate position. In addition, by removing the metal film by etching or the like, wirings can be formed thin and, therefore, formed at fine pitch.
Further, since the core substrate is constituted by providing resin substrates in amultilayer manner, it can obtain sufficient strength. Besides, since the core substrate is constituted smoothly by providing the first resin substrate and the third resin substrate on the both sides of the core substrate, respectively, it is possible to appropriately form interlayer resin insulating layers and conductor circuits on the core substrate and to thereby decrease the probability of the occurrence of defective printed circuit boards.
In order to achieve the above purpose, according to claim 54, a printed circuit board constituted by providing resin insulating layers and conductor circuits on a core substrate in a multilayer manner, characterized in that
a capacitor is included in said core substrate, and a relatively large lower-layer via hole connected to an electrode of said capacitor is formed; and
a plurality of relatively small upper-layer via holes connected to one said lower-layer via hole are provided in an interlayer resin insulating layer on an upper surface of said core substrate.
According to claim 54, a capacitor is included in the core substrate, a relatively large lower-layer via hole connected to a terminal of the capacitor is formed, and a plurality of relatively small upper-layer via holes connected to one the lower-layer via hole are provided in an interlayer resin insulating layer on an upper surface of the core substrate. By doing so, it is possible to connect the terminal of the capacitor to the lower-layer via holes even if the position at which the capacitor is provided is shifted, and it is possible to ensure the supply of power from the capacitor to the IC chip. Further, by providing a plurality of relatively small upper-layer via holes, it is possible to obtain the same effect as that of connecting inductances in parallel. Thus, the high frequency characteristics of power supply lines and ground lines are enhanced, thereby making it possible to prevent the malfunction of the IC chip due to lack of supply of power or the variation of earth level. Moreover, since the wiring length can be shortened, it is possible to reduce loop inductance.
It is preferable that a concave portion is filled with a resin. By removing the gap between the capacitor and the core substrate, the capacitor included in the core substrate behaves less frequently. Even if a stress resulting from the capacitor occurs, the stress can be eased by the filled resin. Also, the resin can advantageously bond the capacitor to the core substrate and prevent migration.
According to claims 55 and 56, a filled via hole having a flat surface is employed as the lower-layer via hole. Due to this, it is possible to directly connect a plurality of upper-layer via holes to one lower-layer via hole. Thus, it is possible to enhance the characteristics of the connection between the lower-layer via hole and the upper-layer via hole and to thereby ensure the supply of power from the capacitor to the IC chip.
According to claim 57, one capacitor is contained in a concave portion formed in the core substrate. Thus, the capacitor is arranged in the core substrate, so that the distance between the IC chip and the capacitor is shortened and it is possible to reduce the loop inductance of the printed circuit board.
According to claim 58, a plurality of capacitors are contained in the concave portion. Due to this, it is possible to realize the high integration of capacitors.
According to claims 59 and 60, the electrode of the chip capacitor on which the metal film is formed is made electrically connectable using a via hole made of a plated material. Here, the electrode of the chip capacitor is made by metalization and has irregular portions on the surface thereof. However, since the surface of the chip capacitor is smoothed by the metal film and the via hole is formed, resin residue does not remain when a through hole is formed in the resin coated on the electrode and the reliability of the connection between the via hole and the electrode can be enhanced. Further, since the via hole is formed by plating in the electrode having a plated member formed thereon, the characteristics of the connection between the electrode and the via hole is high and disconnection does not occur between the electrode and the via hole even if a heat cycle test is conducted.
The surface of the chip capacitor may be roughed. By doing so, the adhesiveness between the chip capacitor made of ceramic and the bonding layer, the interlayer resin insulating layers made of a resin is high and the separation of the bonding layers and the interlayer resin insulating layers does not occur to interfaces even if a heat cycle test is conducted.
According to claim 61, at least a part of a coating layer of the electrode of the capacitor is exposed and contained in the printed circuit board to thereby make the electrode exposed from the coating layer electrically connectable. In this case, it is preferable that the metal exposed from the coating layer mainly consists of copper. This is because high connection characteristics can be ensured and connection resistance can be reduced even if a metal layer is formed by plating on the exposed metal.
According to claim 62, a chip capacitor having electrodes formed inside of an outer edge thereof is employed. Due to this, even if continuity is established through the via hole, a large external electrode can be provided and the allowable range of alignment is widened, so that connection defect can be eliminated.
According to claim 63, a capacitor having electrodes formed in a matrix is employed. Due to this, a large chip capacitor can be contained in the core substrate. Accordingly, capacitance can be increased and electrical problems can be, therefore, solved. Besides, even if going through various heat histories, the printed circuit board does not warp so easily.
According to claim 64, a plurality of chip capacitors for providing many capacitors may be coupled to be employed as the capacitor. By doing so, it is possible to appropriately adjust capacitance and to appropriately operate the IC chip.
According to claim 65, a resin is filled between the core substrate and the capacitor, and the coefficient of thermal expansion of the resin is set lower than that of the core substrate, i.e., set closer to that of the capacitor made of ceramic. Due to this, even if an internal stress resulting fromthe difference in the coefficient of thermal expansion between the core substrate and the capacitor occurs in a heat cycle test, cracks, separation and the like less occur to the core substrate, thereby making it possible to attain high reliability.
According to claim 66, a printed circuit board manufacturing method characterized by comprising at least the following steps (a) to (e):
(a) embedding a capacitor in a core substrate;
(b) forming a resin insulating layer on an upper surface of said capacitor;
(c) forming a relatively large lower-layer via hole connected to an electrode of said capacitor, in said resin insulating layer;
(d) forming an interlayer resin insulating layer on an upper surface of said core substrate; and
(e) providing a plurality of relatively small upper-layer via holes connected to one said lower-layer via hole, in said interlayer resin insulating layer.
According to claim 66, a capacitor is included in the core substrate, a relatively large lower-layer via hole connected to a terminal of the capacitor is formed, and a plurality of relatively small upper-layer via holes connected to one the lower-layer via hole are provided in an interlayer resin insulating layer on an upper surface of the core substrate. By doing so, it is possible to connect the terminal of the capacitor to the lower-layer via even if the position at which the capacitor is provided is shifted, and it is possible to ensure the supply of power from the capacitor to the IC chip. Further,by providing a plurality of relatively small upper-layer via holes, it is possible to obtain the same effect as that of connecting inductances in parallel. Thus, the high frequency characteristics of power supply lines and ground lines are enhanced, thereby making it possible to prevent the malfunction of the IC chip due to lack of supply of power or the variation of earth level. Moreover, since the wiring length can be shortened, it is possible to reduce loop inductance.
According to claim 67, one capacitor is contained in a concave portion formed in the core substrate. Thus, the capacitor is arranged in the core substrate, so that the distance between the IC chip and the capacitor is shortened and it is possible to reduce the loop inductance of the printed circuit board.
According to claim 68, a plurality of capacitors are contained in the concave portion. Due to this, it is possible to realize the high integration of capacitors.
According to claim 69, a through hole is formed in a resin material containing a resin serving as a core material, and a resin material is bonded to the resin material in which the through hole is formed, thereby forming a core substrate having a concave portion. Due to this, it is possible to form a core substrate having a concave portion which has a flat base.
According to claims 70 and 71, a filled via hole having a flat surface is employed as the lower-layer via hole. Due to this, it is possible to directly connect a plurality of upper-layer via holes to one lower-layer via hole. Thus, it is possible to enhance the characteristics of the connection between the lower-layer via hole and the upper-layer via hole and to thereby ensure the supply of power from the capacitor to the IC chip.
According to the invention recited in claim 72, upper surfaces of the plurality of capacitors within the concave portion are pressed or struck from above, therebymaking heights of the upper surfaces of the capacitors uniform. Accordingly, in providing a plurality of capacitors within the concave portion, the heights of the capacitors can be made uniform and the core substrate can be made smooth even if the sizes of the plural capacitors are uneven. Thus, it is possible to appropriately form upper interlayer resin insulating layers and conductor circuits without hampering the smoothness of the core substrate, and, therefore, to decrease the probability of the occurrence of defective printed circuit boards.